Recent U.S. patents related to Computer Architecture:
6,381,735: Dynamic classification of sections of software
6,381,732: FPGA customizable to accept selected macros
6,381,691: Method and apparatus for reordering memory operations along multiple execution paths in a processor
6,381,686: Parallel processor comprising multiple sub-banks to which access requests are bypassed from a request queue when corresponding page faults are generated
6,381,656: Method and apparatus for monitoring input/output ("I/O") performance in I/O processors
6,381,635: Method for displaying multiple performance measurements of a web site using a platform independent program
6,381,628: Summarized application profiling and quick network profiling
6,381,562: Configurable bio-transport system simulator
6,381,223: Ring-bus technology
6,381,169: High density non-volatile memory device
6,380,942: Packetized command interface to a graphics processor
6,378,066: Method, apparatus, and article of manufacture for developing and executing data flow programs, and optimizing user input specifications
6,378,063: Method and apparatus for efficiently routing dependent instructions to clustered execution units
6,378,062: Method and apparatus for performing a store operation
6,378,061: Apparatus for issuing instructions and reissuing a previous instructions by recirculating using the delay circuit
6,378,040: Word selection logic to implement an 80 or 96-bit cache SRAM
6,378,020: System having double data transfer rate and intergrated circuit therefor
6,378,001: Collaborative framework with shared objects
6,377,980: Methods and apparatus for a directory-less memory access protocol in a distributed shared memory computer system
6,377,568: Method and apparatus for performing call matching for internet telephones in legacy call centers
6,377,285: Zooming space-grid for graphical user interface
6,374,403: Programmatic method for reducing cost of control in parallel processes
6,374,402: Method and apparatus for installation abstraction in a secure content delivery system
6,374,367: Apparatus and method for monitoring a computer system to guide optimization
6,374,360: Method and apparatus for bit-to-bit timing correction of a high speed memory bus
6,374,349: Branch predictor with serially connected predictor stages for improving branch prediction accuracy
6,374,347: Register file backup queue
6,374,344: Methods and apparatus for processing load instructions in the presence of RAM array and data bus conflicts
6,374,341: Apparatus and a method for variable size pages using fixed size translation lookaside buffer entries
6,374,340: Method of managing memory for a PCI bus
6,374,337: Data pipelining method and apparatus for memory control circuit
6,374,331: Distributed directory cache coherence multi-processor computer architecture
6,374,329: High-availability super server
6,374,255: Haptic authoring
6,373,994: Low latency correlation
6,373,752: Synchronous dynamic random access memory device
6,371,355: Method and apparatus for solder joint integrity assessment
6,370,631: Memory controller including compression/decompression capabilities for improved data access
6,370,627: Memory device command buffer apparatus and method and memory devices and computer systems using same
6,370,622: Method and apparatus for curious and column caching
6,370,616: Memory interface controller for datum raid operations with a datum multiplier
6,370,593: Apparatus for multiplexing bus interfaces on a computer expansion
6,370,585: Multiprocessing computer system employing a cluster communication launching and addressing mechanism
6,370,581: Method, apparatus, and product for transmitting multibyte characters in a network
6,370,564: Computer system architecture and method for multi-user, real-time applications
6,370,541: Design and implementation of a client/server framework for federated multi-search and update across heterogeneous datastores
6,370,537: System and method for the manipulation and display of structured data
6,370,145: Internet switch router
6,369,837: GUI selector control
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